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Loading... E:\allegroXUEXI20210218\ALLEGROLIANXI20210216\SCH\ZHONGJIBAN\allegro/pstchip.dat/ v1 J9 D0 [8 ]7 ]; [, G) q3 n5 p
% {, ^9 \4 g8 S+ b+ u; m" KLoading... E:\ALLEGROXUEXI20210218\ALLEGROLIANXI20210216\SCH\ZHONGJIBAN\allegro/pstchip.dat
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Loading... E:\ALLEGROXUEXI20210218\ALLEGROLIANXI20210216\SCH\ZHONGJIBAN\allegro/pstxprt.dat
* X8 g; i' Y8 h7 s#77 ERROR(SPCODD-77): Could not open file E:\ALLEGROXUEXI20210218\ALLEGROLIANXI20210216\SCH\ZHONGJIBAN\allegro/pstxprt.dat.
5 ~ \/ Z& v3 m) y, `You might be trying to reuse a design with an inaccessible state file. To reuse a design, ensure that the design being reused is treated as a subdesign and the subdesign state file is accessible and readable. To create the subdesign state file, use the GEN_SUBDESIGN directive.( o! s% T+ ^; n! N) K t% x+ K' K
ERROR(SPCODD-382): Error at line 1 in file E:\ALLEGROXUEXI20210218\ALLEGROLIANXI20210216\SCH\ZHONGJIBAN\allegro/pstxprt.dat. Error loading the parts list file% f, T* I+ Q" u8 N: i! X1 i9 N
) a7 N+ S- [, F#292 ERROR(ORCAP-36026): Unable to read logical netlist data.7 Z: F8 S+ U* v" _4 c
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9 y1 ]/ m7 f4 B: G; |7 y1 e* horcad在導(dǎo)網(wǎng)表時(shí)出現(xiàn)打不開pstxprt.dat文件，在Allegro文件下不能找到該文件，不知道為什么沒有生成，懇請大佬幫助一下。
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