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發(fā)表于 2022-11-29 15:36:52 | 只看該作者 回帖獎(jiǎng)勵(lì) |倒序?yàn)g覽 |閱讀模式
Error: Port "clk" of type NOC of instance "inst1" is missing source signal
( p" r  M+ l! ^2 \1 r5 }" UError: Port "address[9..0]" of type sin of instance "inst7" is missing source signal* ]- L" B1 }( D% a; R
Error: Port "clock" of type mult10x8 of instance "inst8" is missing source signal
. r1 m, W  R8 ]3 V% J6 qError: Port "clock" of type mult10x8 of instance "inst14" is missing source signal
2 ]" w2 @1 v# r& i. k6 BError: Width mismatch in port "dataa[9..0]" of instance "inst" and type ADDF8 -- source is ""result[19..0]" (ID mult10x8:inst8)"
1 X# {2 y! c; c. b2 [, @# @) {Error: Width mismatch in port "datab[9..0]" of instance "inst" and type ADDF8 -- source is ""

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